Department

Computer Science and Cybersecurity

Document Type

Poster

Abstract

As organizations increasingly adopt Zero Trust security models to mitigate cyber threats, the focus is often placed on network, identity, data protection, and software layers. In this discussion, the hardware layer upon which the system is built is often overlooked. However, once the underlying hardware is compromised, no amount of software-based security can fully protect against advanced attacks. To address this gap, this project explores how Zero Trust principles can be applied to processors to ensure hardware-level trust validation and built-in defense mechanisms from the ground up. Specifically, we discuss key capabilities that processors must support to demonstrate compliance with the pillars of the Department of Defense (DoD) Zero Trust framework.

Publication Date

Spring 4-15-2025

Comments

Spring 2025: Student Research Conference

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